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Tomographic atomic force microscopy for materials research and failure analysis in the semiconductor industry of the post-nanometer era

Professor Umberto Celano

The naming conventions employed by leading semiconductor foundries to describe the next generation of nanoelectronics signal the dawn of the Angstrom era. The unit (Å) is used to measure atoms, and ionic radius with 1Å roughly equal to the diameter of one atom, or 0.1 nm. Although discrete manufacturing at this scale is still unattainable, the design of the upcoming logic and memory devices revolves around increasingly smaller architectures, incorporating three-dimensional structures and a wider range of materials.

Anticipated advancements in transistor design include the transition from FinFET to gate-all-around (GAA) and nanosheets designs at 2nm, followed by groundbreaking concepts like vertical, stackable architectures, and atomic channels going beyond. Consequently, evaluating the properties of materials at the nanometer scale to establish correlations with device functionality, reliability, and failures presents a significant challenge for the scientific community. In this context, I will provide an overview of various areas of research in the semiconductor industry that aim to merge our current capabilities in materials characterization with correlative, site-specific metrology, and failure analysis using tomographic atomic force microscopy methods.